±1 LSB INL; no missing codes. – Programmable throughput up to ksps. – 8 external inputs; programmable as single-ended or differential. CF Mixed-signal 64KB Isp Flash MCU. ANALOG PERIPHERALS – SAR ADC ± 1 LSB INL Programmable Throughput to ksps to 8 External Inputs;. Silicon Labs CFTB. Explore Integrated Circuits (ICs) on Octopart: the fastest source for datasheets, pricing, specs and availability.

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Slave Receiver Mode Figure Power Management Modes Update Output Based on Timer Overflow 8. Configuring Port Pins as Digital Inputs Clock Low Extension SPI0 Operation Figure Configuring Port Pins as Digital Inputs ADC Modes of Operation Software Forced Reset Reset Electrical Vatasheet Crossbar Pin Assignment and Allocation On-Board Clock and Reset 1.


Configuring Ports which are not Pinned Out Register Descriptions Figure Interrupt Register Descriptions Figure Typical Slave Receiver Sequence datasehet Missing Clock Detector Reset Timer 3 Low Byte Figure CF Block Diagram Figure 1.

Address Register Figure Control Register Figure Typical SPI Interconnection Frequency Output Mode Figure Configuring the Output Modes of the Port Pins Ports 0 through 3 and the Priority Crossbar Decoder External Crystal Example Configuring the External Memory Interface Split Mode without Bank Select High Speed Output Mode Figure Settling Time Requirements Figure 7.

Timer 3 Block Diagram Figure Global DC Electrical Characteristics 4. T4 Mode 1 Block Diagram Port3 Output Mode Register Figure Flash Programming Commands Figure External Memory Interface Control Figure Typical Slave Transmitter Sequence Configuring the Output Modes of the Port Pins Port Selection and Configuration Instruction and CPU Timing Update Output Based on Timer Overflow Analog Multiplexer and PGA T4 Mode 2 Block Diagram Figure Oscillator Diagram Figure